pub fn frcsr() -> u32
🔬This is a nightly-only experimental API. (
stdsimd
#27731)Available on RISC-V RV32 only.
Expand description
Reads the floating-point control and status register fcsr
Register fcsr
is a 32-bit read/write register that selects the dynamic rounding mode
for floating-point arithmetic operations and holds the accrued exception flag.
According to “F” Standard Extension for Single-Precision Floating-Point, Version 2.2,
register fcsr
is defined as:
Bit index | Meaning |
---|---|
0..=4 | Accrued Exceptions (fflags ) |
5..=7 | Rounding Mode (frm ) |
8..=31 | Reserved |